In recent decades, great advances have been made in the art of fabricating integrated circuits. Such advances have made it possible to pack a great number of circuit elements and connecting circuit lines into a small space. For example, it is possible to fabricate integrated circuits with several hundred thousand active circuit elements in less than a square centimeter. Advances have also begun to make it possible to fabricate integrated circuits over much larger areas by the use of such techniques as wafer scale integration and large area integration using amorphous semiconductor materials. Large area integration using amorphous semiconductor materials is of particular interest because it enables an integrated circuit to be created over an area much larger than that of currently available crystalline substrates. Amorphous semiconductors circuit elements can be created without crystalline substrates and without the high temperature required for the formation of crystalline semiconductor devices. As a result, amorphous semiconductor devices can be created on a wide range of substrates, such as glass plates or continuous rolls of stainless steel. Take for example, U.S. patent application Ser. Nos. 458,919 filed on Jan. 18, 1983 and 558,216 filed on Dec. 5, 1983 both entitled "Electronic Matrix Arrays and Method for Making the Same" both of which were filed by the inventor of the present application and assigned to the assignee of the present application, and both of which are incorporated herein by reference. Both of these patent applications show electronic matrix arrays in which a plurality of first spaced apart address lines and a plurality of second spaced apart address lines cross to form a plurality of intersections. Material extending between the first and second sets of address lines create circuit elements between the intersecting address lines . Integrated circuits of the type disclosed in these two applications are well suited for large area fabrication. Similarly, U.S. patent application Ser. No. 573,004 filed on Jan. 23, 1984 by Zvi Yaniv, Vin Cannella, Greg Hansell and Lou Swartz and entitled "Liquid Crystal Displays Operated by Amorphous Silicon Alloy Diodes," which has been assigned to the assignee of the present application, and which is incorporated herein by reference, discloses, among other things, a liquid crystal display formed of two opposing plates, each of which can be made as a single integrated circuit fabricated by deposition and photolithography. The plates of such a display are well suited for large area fabrication, and can be made large enough for use as normally sized computer or television screens.
Sometimes the conductive lines which connect the elements of an integrated circuit to each other or to the contact pads through which such elements communicate with the external world contain unintended breaks, or discontinuities, in which the resistance is unacceptably high. Such breaks cause electrical open circuits or high resistance sections in what are intended to be electrically conductive current paths. Such open circuits can be formed either when a circuit is fabricated or after its fabrication is complete. Line breaks formed during the fabrication of a circuit normally results from failures in the photolithographic processes used to make the circuit. Post fabrication line breaks can be caused by such factors as vibration, thermal expansion and contraction, and metal migration, which is the flow of metals caused by high current densities. As the number of conductive lines packed into a given area of an integrated circuit increases, and as the area of such circuits is increased, the chance for conductive line breaks grows, making the problems of such line breaks an important factor to contend with.
The problem of line breaks is particularly important in the fabrication of liquid crystal displays. It is desirable to manufacture such displays in a large area, such as approximately one foot square, so they can be used to replace computer and television screens. If there is a break in an address line used in such a display, all of the display pixels disconnected by the break become inoperative. The failure of an individual pixel is often acceptable, but the failure of all the pixels in a part of a row or column normally makes a display unmarketable.
A major prior art method for dealing with electrical breaks in the conductive lines of integrated circuits is to produce such integrated circuits in large numbers, to test them, and then to throw away those circuits which malfunction. More advanced techniques have been developed which use the technique of redundancy. For example, U.S. Pat. No. 4,228,528, issued on Oct. 14, 1980 to Cenker et al and entitled "Memory With Redundant Rows and Columns" discloses a memory device in which there are fuses placed between decoder circuits and the row or column memory lines associated with each of those decoders. If a given memory line is found to be defective, its fuse is blown, disconnecting it from its decoder. Then a spare, programmable decoder connected to a spare memory line is programmed to respond to the bit pattern of the disconnected decoder. Although redundancy techniques such as those disclosed in the Cenker et al. patent are very useful in many applications, they result in the disconnection of circuit elements which could be used if such circuit breaks could be repaired. In addition, such redundancy techniques are often not satisfactory when used in displays, since it is not satisfactory to replace a given row or column of a display with a row or column located at a different place. Furthermore, in circuits, such as microprocessors, in which the layout is much less uniform than in memory circuits, the use of redundancy techniques is quite complex.
Problems with breaks and discontinuities in conductive lines are not limited to integrated circuits. They can arise in many kinds of electrical circuitry. For example, interconnect substrates upon which integrated circuits or integrated circuit packages are mounted, such as printed circuit boards, ceramic interconnect substrates and polyimide interconnect systems, usually contain many circuit lines. A failure in any of one of these lines can cause the whole circuit in which such an interconnect substrate is used to malfunction. As the complexity and circuit density of integrated circuits has increased, so has the complexity and density of interconnect substrates and the likelihood of breaks and discontinuities in the circuit lines of such substrates. Thus there is a strong need for a way to heal such breaks or discontinuities once they occur.